This disclosure relates to systems and methods to clear and rebuild dependencies in electronic applications and, in particular to systems and methods to clear and rebuild dependencies within processors, such as in a scheduler, buffer, or other memory structure.
Current processors allow speculative instructions to speculatively clear dependencies for dependent instructions. Clearing the dependencies is performed, for instance, by clearing a dependency bit corresponding to the speculative instruction in a dependency vector of a dependent instruction. However, as the execution of the instruction was only speculative, various events, such as load misses, faults, hazards, and the like, may cause the execution of a speculative instruction to be cancelled. In this case, the dependency vectors of the dependent instructions must be rebuilt to recreate the cleared dependencies. Unfortunately, this can require a complex process of re-comparing source tags against the cancelled destination tags and setting the dependency bits again. This rebuilding process can be costly both in terms of processor resources and power.